High Performance Multi-Channel High-Speed I/O Circuits
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Beschreibung
This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures. von Harjani, Ramesh und Oh, Taehyo
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Über den Autor
- Hardcover
- 92 Seiten
- VDE VERLAG
- Hardcover -
- Erschienen 1982
- Teubner B.G. GmbH
- Hardcover -
- Erschienen 1998
- Teubner B.G. GmbH
- Hardcover -
- Erschienen 2001
- Springer-Verlag GmbH